A processor is using an 8K Byte 8-way set-associative L1 data cache with a 32-byte block size. This cache is virtually indexed and physically tagged, and the processor’s virtual address size is 64 bits but the physical address is only 48 bits.
The cache keeps a tag for each line to compare it with the tag of the requested address. How many bits are needed in this entire cache to store all these tags?
In the physical address, the uppermost 38 bits are tag bits (the others are index and offset bits). Each line in the cache must have 38 bits to store the tag, so there are a total of 38*256= 9728 tag bits.