Problem Set Solutions/Advanced Caches/Problem02

A processor is using an 8K Byte 8-way set-associative L1 data cache with a 32-byte block size. This cache is virtually indexed and physically tagged, and the processor’s virtual address size is 64 bits but the physical address is only 48 bits.

How many sets are there in this cache and how many lines are there in each set?


There are 32 sets and 8 lines in each set.