hpca/f2014 projects/project1 Question and Answer Page

Q1: I would like to start a thread on how the branch predictor code in this simulator works


libbooksim - This is the source code for modeling the on-chip interconnect (a mesh)

libcmp - This is the code for modeling caches and cache coherence in a multi-core chip

libcore - This is the code for modeling the guts of a core and also for managing the mapping of application threads to available cores

libemul - This is the code for emulating the execution of instructions (basically a MIPS ISA emulator) and also for modeling Linux system calls

libll - This is the code for interfacing the ISA emulator with the cycle-accurate timing model (libcore)

libmem - This is the code for single-core caches, TLBs, memory, and also prefetchers

libsmp - This is the code for multi-chip multiprocessor caches and cache coherence. It is similar to libcmp, and in fact libcmp was derived from this code.

libsuc - This is the code for various data structures and other things that are used elsewhere

The code for branch predictors is in the libcore directory, files BPred.h and BPred.cpp, and it uses the SCTable class whose home is in the libsuc directory. The way the simulator creates branch predictors (and everything else for a core) is that it goes through the configuration file to find read the specification for the cores that will be used. The class that models a core needs to create FetchEngine for that core (the part that fetches instruction). When an instance of FetchEngine is instantiated, it in turn will create an instance of the BPredictor class. The BPredictor class is defined in BPRed.h/BPred.cpp. What it does is look at the type of the predictor (hybrid, oracle, taken, etc.), then create an instance of a predictor of that type. Take a look at BPredictor::getBPred() method to see al the types it can support, and which classes get used for which "type" string.