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Assembly Language Programming

Assembly Code References

The assembly code used in the course examples is based on commands from different instruction sets. Most of those instruction sets can be found in the links listed below.

Intel 64 ISA

Intel Itanium ISA

68000 Instruction Set

MIPS ISA

MIPS Instructions

MIPS IV Instruction Set

ARM ISA

ARM Assembly Language Programming

LLVM Code

SPARC Instruction Set

AMD ISA

Introduction to Assembly Programming

Instructions used in the course examples:

(2P) ADD r1 = r2 + r3 Look in 2P to determine if the add should be completed and the sum stored in r1

(2P) ADDI R2,R2,1 Look in 2P to determine if the add should be completed and the sum stored in R2

ADD add with overflow adds two registers and store the sum in a register

ADD.D add decimal point numbers adds two decimal point numbers and store the sum in a register

ADDI add immediate with overflow adds a register and an immediate value and stores the sum in a register

ADDUI R!,R1,#-8 ADDIU "add immmediate unsigned (no overlfow)" "add a register and an immediate value and stores the sum in a register"

BEQ branch on equal

BEQZ branch on equal to zero

BGT branch if greater than

BLE branch if less than

BNE branch on not equal

BNEZ branch if not equal

BR branch

CHK.S check validity of data in given register

CLR clear

CMOVZ conditional move if zero

CMP.EQ compare for equality

CMP.GT compare for greater than

DIV divide a word

DIV.D divide with double precision

EQ equals

JMP jump

LD load a doubleword

LL load linked word

Load get a value from memory

LW load a word

MOV move

MOVN move conditional on not zero

MOVZ move conditional on zero

MP.EQZ P1, P2, R1 Set the predicates P1 and P2 by comparing R1 to 0. If R1 == 0, P1 == true, P2 == false.

MUL multiply

NOP no operation

SC store conditional word

SHL shift left

SD store a double word

SUB subtract

SUB.D substract with double precision

SW R1,9(R1)

TBIT determine the state of the requested bit in the given register

XOR exclusive or